000			01820cam a2200361 a 4500
001			3989
003			BD-DhEWU
005			20180227204826.0
008			940414s1994 nyua 001 0 eng d
010			_a93-43595
020			_a0070163332
020			_a0071132716 (Cover)
035			_a(OCLC) 29428443
040			_aBD-DhEWU _beng _cBD-DhEWU
041			_aeng
082	0	4	_222 _a621.3950285 _bMIS 1994
100	1		_aDe Micheli, Giovanni _910072
245	1	0	_aSynthesis and optimization of digital circuits / _cGiovanni De Micheli
260			_aNew York ; _aLondon : _aNew Dehi : _bMcGraw-Hill, _cc1994
300			_axviii, 579 p ; _c23 cm
490	1		_aMcGraw-Hill series in electrical and computer engineering. Electronics and VLSI circuits
505	0		_a Chapter 1: Introduction -- Chapter 2: Background -- Chapter 3: Hardware modeling -- Chapter 4: Architectural synthesis -- Chapter 5: Scheduling algorithms -- Chapter 6: Resource sharing and binding -- Chapter 7: Two-level combinational logic optimization -- Chapter 8: Multiple-level combinational logic optimization -- Chapter 9: Sequential logic optimization -- Chapter 10: Cell-library binding -- Chapter 11: State-of-the-art and future trends. _tTOC
526			_aEEE
590			_aShaharima Parvin
650		0	_aDigital integrated circuits _xDesign and construction _xData processing _910073
650		0	_aDigital electronics _xData processing _910074
650		0	_aComputer-aided design _910075
830		0	_aMcGraw-Hill series in electrical and computer engineering. _922218
856	4	2	_3WorldCat details _uhttps://www.worldcat.org/title/synthesis-and-optimization-of-digital-circuits/oclc/29428443&referer=brief_results
856	4	2	_3E-book Fulltext _uhttp://lib.ewubd.edu/ebook/3989
942	4	2	_2ddc _cTEXT _02
999			_c3989 _d3989
999			_c3989 _d3989