000			02099cam a2200337 a 4500
001			398
003			BD-DhEWU
005			20140707173415.0
008			990130s1994 maua g b 001 0 eng d
010			_a 94014555
020			_a0201633388 (recycled paper)
020			_a9780201633382
035			_a(OCoLC)30110447 _a(BD-DhEWU)398
040			_aDLC _cDLC _dDLC _dBD-DhEWU _beng
041			_aeng
050	0	0	_aQA76.76.O63 _bS3756 1994
082	0	4	_a005.42 _bSCW 1994
100	1		_aSchimmel, Curt, _d1959- _92971
245	1	0	_aUNIX systems for modern architectures : _bsymmetric multiprocesssing and caching for kernel programmers / _cCurt Schimmel.
260			_aReading, Mass. : _bAddison-Wesley, _cc1994.
300			_axxiv, 396 p. : _bill. ; _c24 cm.
440		0	_aAddison-Wesley professional computing series _91728
500			_aOnline version: Schimmel, Curt, 1959- UNIX systems for modern architectures. Reading, Mass. : Addison-Wesley, c1994 (OCoLC)68237426
504			_aIncludes bibliographical references and index.
505			_tTOC _aCh. 1. Review of UNIX Kernel Internals -- Pt. I. Cache Memory Systems. Ch. 2. Introduction to Cache Memory Systems. Ch. 3. Virtual Caches. Ch. 4. Virtual Caches with Keys. Ch. 5. Virtual Caches with Physical Address Tags. Ch. 6. Physical Caches. Ch. 7. Efficient Cache Management Techniques -- Pt. II. Multiprocessor Systems. Ch. 8. Introduction to Multiprocessor Systems. Ch. 9. Master-Slave Kernels. Ch. 10. Spin-Locked Kernels. Ch. 11. Semaphored Kernels. Ch. 12. Other MP Primitives. Ch. 13. Other Memory Models -- Pt. III. Multiprocessor Systems with Caches. Ch. 14. Introduction to MP Cache Consistency. Ch. 15. Hardware Cache Consistency -- Appendix A: Architecture Summary -- Appendix B: Answers to Selected Exercises.
526			_aCSE
590			_aTahur Ahmed
650		0	_aComputer architecture. _92972
856	4	2	_3Worldcat Details _uhttp://www.worldcat.org/title/unix-systems-for-modern-architectures-symmetric-multiprocesssing-and-caching-for-kernel-programmers/oclc/30110447&referer=brief_results
942			_2ddc _cTEXT
999			_c398 _d398